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Kingston 4GB Memory Model KVR1333D3N9_4G项目内容
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Introduction
• JEDEC Standard 1.5V (1.425V - 1.575V) Power Supply
• VDDQ = 1.5V (1.425V - 1.575V)
• 667MHz fCK for 1333Mbc/pin
• Eight Independent Internal Banks
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
• 8-Bit Pre-fetch
• Burst Length: 8 (Interleave without limit, sequential with starting address "000" only), four with tCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS)
• Bi-directional Differential Data Strobe
• Internal Calibration: Internal self calibration through ZQ-pin (RZQ: 240ohm ± 1%)
• On-Die Termination using ODT Pin
• Average Refresh Period: 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB: Height 0.740" (18.75mm), Double sided component
• VDDQ = 1.5V (1.425V - 1.575V)
• 667MHz fCK for 1333Mbc/pin
• Eight Independent Internal Banks
• Programmable CAS Latency: 9, 8, 7, 6
• Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
• Programmable CAS Write Latency(CWL) = 7 (DDR3-1333)
• 8-Bit Pre-fetch
• Burst Length: 8 (Interleave without limit, sequential with starting address "000" only), four with tCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS)
• Bi-directional Differential Data Strobe
• Internal Calibration: Internal self calibration through ZQ-pin (RZQ: 240ohm ± 1%)
• On-Die Termination using ODT Pin
• Average Refresh Period: 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
• Asynchronous Reset
• PCB: Height 0.740" (18.75mm), Double sided component
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